
(This position includes requirements from multiple departments, and the specific requirements will vary depending on the department.)
Responsibilities
1. Design, develop, and verify RTL/digital circuits, including synthesis and simulation.
2. Engage in FPGA synthesis, verification, and emulator platform integration.
3. Develop and integrate SoC architecture and high-speed Serdes IO.
4. Perform system integration, ASIC/FPGA verification, and support mass production IC maintenance.
5. Enhance design robustness and verification environment, and support compliance testing for high-speed interfaces.
1. Proficient in ASIC design flow, including UPF, synthesis, STA, and DFT methodologies.
2. Experienced in ASIC/FPGA integration, ARM CPU architecture, and high-speed I/O protocols (PCIe, USB, DDR).
3. Skilled in Verilog/SystemVerilog RTL coding and familiar with scripting languages (TCL, Perl, shell scripts).
4. Knowledgeable in EDA tools (Design Compiler, PrimeTime, Conformal LEC) and advanced process nodes (28nm, 12nm).
5. Familiar with low-power design, SOC DFT implementation, and compliance testing for USB3.2, SATA, PCIe.
Expatriate
No business trip required
Working Hours
Day Shift
Remote Work
On-site
Job Location
新北/新竹
Holiday
Complies with Labor Standards Act
Onboard Day
Based on interview
Number of Vacancies
1 person
Stock and Bonus
None
Experience Required
3-5 years
Education Required
University / Bachelor degree or equivalent
Language Required
Additional Salary Information
固定或變動薪資因個人資歷或績效而異
...
【你的下一個職涯機會,從這裡開始】 HuntByte 代徵職缺,是專為求職者打造的精準媒合服務。 我們串連多位專業獵才顧問,讓每個職缺都能被更多合適的人才看見,也讓你不用海投履歷,就能被真正適合的機會找到。 當你應徵一個 HuntByte 代徵職缺,你的履歷會由熟悉該職缺的獵才顧問親自檢視,協助你評估這個機會是否適合你,並在面試前給你實際的建議。 你不需要獨自摸索面試眉角、也不需要猜測企業到底在找什麼樣的人——顧問會站在你這邊,幫你把履歷和經驗,用企業聽得懂的方式呈現出來。 我們相信,好的媒合不是量大就好,而是找到真正契合的機會。這也是為什麼每個代徵職缺背後,都有......