【代徵】美國掛牌 IC 設計公司-APR 工程師
Job Description
1. Engage in physical design tasks.
2. Including floorplanning, power grid design, physical synthesis, clock tree synthesis, routing, and DRC/LVS leading to tapeout.
Job Requirement
1. Proficient with EDA tools such as Synopsys ICC2 or FC, PrimeTime, Cadence Innovus, and Tempus.
2. Capable of executing the netlist-to-GDSII design flow, covering floorplanning, power grid development, clock tree synthesis, place and route, and physical verification.
3. Skilled in hierarchical implementation, low-power design methodologies, timing closure, IR drop analysis, and crosstalk analysis.
4. Experienced with scripting languages like TCL, Perl, and Python for design automation.
5. Experience in 55nm/40nm design is essential; familiarity with 28nm/16nm or smaller nodes is a plus.
6. Expertise in FinFet design is essential, and experience in whole chip integration is advantageous.
Job Status Description
Expatriate
No business trip required
Working Hours
Day Shift
Remote Work
On-site
Job Location
新北市
Holiday
Complies with Labor Standards Act
Onboard Day
Based on interview
Number of Vacancies
1 person
Stock and Bonus
None
Experience Required
3-5 years
Education Required
University / Bachelor degree or equivalent
Language Required
Additional Salary Information
固定或變動薪資因個人資歷或績效而異
- New Taipei
- 新北市
- Full-time
- 125000 ~ 333333 TWD / month
- 1500000 ~ 4000000 TWD / year
- No Management Responsibility
-
Collaborating Recruiters
Hiring Companies More Jobs
- 10人以下
- 台北市中山區吉林路309號
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